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BHub, 5th Floor, Maurya Lok Complex, New Dak Bunglow Rd, , Patna, Bihar 800001
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Monday to Friday: 9AM - 5PM
Weekend: 11AM - 3PM
Address
BHub, 5th Floor, Maurya Lok Complex, New Dak Bunglow Rd, , Patna, Bihar 800001
Work Hours
Monday to Friday: 9AM - 5PM
Weekend: 11AM - 3PM
Initiative by Scrollwell
ATAL FDP Semiconductor Technology offers a vital opportunity for educators and researchers to significantly enhance their knowledge in a cutting-edge field. This one-week online Faculty Development Program (FDP) focuses on Advancements in Semiconductor Technology: Trends, Applications, and Future Prospects, addressing the urgent need for trained faculty in this rapidly evolving domain. Specifically, this program, conducted by the Department of E&TC Engineering, SVPM’s College of Engineering, Malegaon (Bk.), is completely free of cost for all eligible participants, making it an accessible path to professional development. Consequently, attending this FDP is crucial for faculty members aiming to upgrade their skills and integrate modern topics into their curriculum, thus bridging the gap between academia and the latest industry requirements.
| Program Highlights | Details |
| Program Title | Advancements in Semiconductor Technology: Trends, Applications, and Future Prospects |
| FDP Thrust Area | Semiconductors |
| Organizing Institution & Department | Shivnagar Vidya Prasarak Mandal’s College of Engineering, Malegaon (Bk.)-Baramati, Department of E&TC Engineering |
| Dates & Duration | 19th January 2026 to 24th January 2026 (6 Days) |
| Mode of Delivery | Online |
| Daily Schedule | 6:00 PM to 9:30 PM (Day 1-5); 2:00 PM to 8:00 PM (Day 6) |
This AICTE Training & Learning (ATAL) FDP is designed to empower faculty to achieve goals of higher education such as access, equity, and quality. Furthermore, the program aligns with AICTE’s commitment to developing quality technical education in India. The primary goal is to provide an in-depth understanding of the fundamentals and advancements in semiconductor technology. Consequently, the FDP will explore emerging trends in semiconductor materials, fabrication processes, and devices.
The FDP primarily targets participants from AICTE-approved institutions.
The comprehensive curriculum systematically covers the entire semiconductor domain. Specifically, the course content includes:
The daily schedule features a series of high-value sessions:
| Day | Time | Topic | Expert |
| Day 1 | 6:30 PM – 9:30 PM | CMOS VLSI Design Roadmap and Upcoming Technologies (Parts I & II) | Mr. Vinay Sharma |
| Day 2 | 6:00 PM – 9:00 PM | IP Implementation & Validation using FPGA; Future of Chip Design Test and Silicon Lifecycle | Dr. Sudarshan Natu; Mr. Sagar B. Girawale |
| Day 3 | 6:00 PM – 9:00 PM | ASIC – Design, Implementation, and Test (Parts I & II) | Mr. Sagar Jagtap |
| Day 4 | 6:00 PM – 9:00 PM | Semiconductor Devices in Modern Electronics; Past, Present and Future of Nanoelectronics | Dr. Mali Madan B.; Dr. Ganesh C. Patil |
| Day 5 | 6:00 PM – 9:00 PM | Advances in smart Sensor technology; Introduction to Semiconductor Fabrication and Clean room technology | Dr. Madhurima Deb; Dr. N. Premsai |
| Day 6 | 2:00 PM – 6:30 PM | Advanced Semiconductor Material and Automotive Applications; Pre-silicon verification of Semiconductor devices; Introduction to Quantum Devices | Mr. Ravindra Shinde; Dr. Ashlesha Gokhale; Dr. Pranav Pawar |
The program features renowned experts with extensive industry and academic experience. Furthermore, participants will benefit from the diverse global and domestic expertise of the resource persons.
| Expert Name | Designation & Organization | Experience |
| Dr. Sudarshan Natu | Cofounder & M.D. Nital Computer Systems, SemiX, IITB Executive | 45+ years |
| Dr. Ashlesha Gokhale | Professor of Practice, COEP Technological University, Pune | 40+ years |
| Dr. Mali Madan B. | Professor & HOD, Sinhgad College of Engineering, Pune | 30+ years |
| Mr. Vinay Sharma | Director, Ni logic Pvt. Ltd. Pune, India | 25+ years |
| Dr. Ganesh C. Patil | Associate Professor, Visvesvaraya National Institute of Technology (VNIT), Nagpur | 25+ years |
| Mr. Sagar Jagtap | R&D Engineer, Presto Engineering, Denmark | 19+ years |
| Dr. Madhurima Deb | Senior Researcher, Leibniz Institute, Berlin, Germany | 15+ years |
| Dr. N. Premsai | Senior Project Engineer, SemiX, IIT Bombay | 15+ years |
| Mr. Sagar B. Girawale | Senior Lead DFT Engineer, Qualcomm, Bengaluru, Karnataka | 11+ years |
| Mr. Ravindra Shinde | Senior Technical Lead, Mercedes Benz Research and Development, Bangalore, Karnataka | 11+ years |
| Dr. Pranav Pawar | Assistant Professor, COEP Technological University, Pune | 10+ years |
Upon successful completion of the FDP, participants will have demonstrably acquired key competencies:
The certification process ensures all participants meet a rigorous standard of engagement and learning.
All interested applicants must complete a two-step registration process to secure their spot.
| Detail | Information |
| Registration Link (Portal) | Click Here |
| Last Date of Registration | 15th January 2026 |
| Registration Fee | Free (Course and Certification Fee) |
| Google Form after Registration | Click Here |
| Schedule Link | Download |
| Brochure Link | Download |
For inquiries regarding the program, please reach out to the program coordinators.
| Role | Name | Mobile | |
| Co-ordinator | Dr. Yuvraj Vijay Parkale | yvparkale@engg.svpm.org.in | 9860307571 |
| Co-coordinator | Dr. (Mrs.) Neeta A. Doshi | nadoshi@engg.svpm.org.in | 93739 30129 |
| Organizing Institution Website | Shivnagar Vidya Prasarak Mandal’s College of Engineering, Malegaon (Bk.)-Baramati | engg.svpm.org.in | 02112 254424 |
The FDP is notably organized by the Department of E&TC Engineering, established in 1991 and also offering Ph.D. research centers affiliated with Savitribai Phule Pune University. Furthermore, the organizing institution, Shivnagar Vidya Prasarak Mandal’s College of Engineering, is accredited by NAAC and approved by AICTE. The program features experts from leading global and domestic organizations such as Leibniz Institute, Presto Engineering, Qualcomm, Mercedes Benz Research and Development, and various premier institutes like IIT Bombay and VNIT Nagpur. Therefore, the FDP provides an invaluable blend of academic and industry perspectives.
1. Who is the FDP primarily designed for?
The primary target audience is faculty members (Assistant Professors, Associate Professors, and Professors) from AICTE-approved institutions. In addition, PG students, research scholars, and industry professionals are also eligible to register for this ATAL FDP Semiconductor Technology.
2. Is there a registration fee for this ATAL FDP?
No, the registration, course, and certification fee is completely free for all eligible participants.
3. What are the requirements to receive the course completion certificate?
To receive the certificate from the AICTE ATAL academy, participants must achieve a minimum of 80% attendance and score a minimum of 70% marks in the final online test.
4. Where is the organizing institution located?
The FDP is organized by Shivnagar Vidya Prasarak Mandal’s College of Engineering, Malegaon (Bk.)-Baramati, Tal- Baramati, Dist-Pune, (Maharashtra) India.
5. What is the last date to register for the FDP?
The final date for registration is 15th January 2026.